Ok I have made wholesale changes to the schematic. Changed the voltage divider biasing to a more conventional biasing schema, adding in some feedback, which i am a bit unsure of, its probably not totally necessary for 40 and 20m band amplifiers, but for higher using IRF510’s its needed, I can always not populate those footprints when i build it. The resistors i had from source to ground were removed, those were meant to be swamp resistors on the gate to tame the lower bands, but they are probably not really needed and finally the biggest change has been to the output transformer, in which the single turn winding is going to be copper tubes with VCC to the drains delivered via the center tap on the single turn winding.
I have also been thinking about ground paths and return loops and all that other stuff that is over my head. But, I think something i am going to do is change the SMD bias components to through hole and move the bias traces to the top of the board, this will give me an almost unbroken ground on the bottom layer. Which can only been a good thing I guess. And I also need to do some research on the rf power handling of trace widths. Yet another thing i really don’t have much of a clue about. So i need to unroute the whole board almost and kind of start again. But for now, its off to find some credible source on trace widths and rf power levels.
Lots has changed since i posted this, this morning. Pretty much changed everything in the board layout. Here is a 3d render of where its at. Yes, i changed back to through hole parts because it would allow me to jump a trace using resistors and keep the bottom copper layer almost completely unbroken. So its a perfect ground plane to stick the broken top copper to.